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 VN3515L VN4012L N-Channel Enhancement-Mode Vertical DMOS FETs
Ordering Information
BVDSS / BVDGS 350V 400V RDS(ON) (max) 15 12 VGS(th) (max) 1.8V 1.8V ID(ON) (min) 0.15A 0.15A Order Number / Package TO-92 VN3515L VN4012L
Features
Free from secondary breakdown Low power drive requirement Ease of paralleling Low CISS and fast switching speeds Excellent thermal stability Integral Source-Drain diode High input impedance and high gain Complementary N- and P-channel devices
Advanced DMOS Technology
These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Supertex's vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.
Applications
Motor controls Converters Amplifiers Telecom Switching Power supply circuits Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.)
Package Option
Absolute Maximum Ratings
Drain-to-Source Voltage Drain-to-Gate Voltage Gate-to-Source Voltage Operating and Storage Temperature Soldering Temperature*
* Distance of 1.6 mm from case for 10 seconds. Note: See Package Outline section for dimensions.
BVDSS BVDGS 20V -55C to +150C 300C
SGD
TO-92
11/12/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
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VN3515L/VN4012L
Thermal Characteristics
Package VN3515L (TO-92) VN4012L (TO-92) * ID (continuous)* 150mA 160mA ID (pulsed) 600mA 650mA Power Dissipation @ TC = 25C 1W 1W
jc
ja
IDR* 150mA 160mA
IDRM 600mA 650mA
C/W
125 125
C/W
170 170
ID (continuous) is limited by max rated Tj.
Electrical Characteristics (@ 25C unless otherwise specified)
Symbol BVDSS VGS(th) IGSS IDSS Parameter Drain-to-Source Breakdown Voltage Gate Threshold Voltage Gate Body Leakage Zero Gate Voltage Drain Current VN3515 VN4012 Min 350 400 0.6 1.8 10 1 100 ID(ON) RDS(ON) ON-State Drain Current Static Drain-to-Source ON-State Resistance VN3515 VN4012 GFS CISS COSS CRSS td(ON) tr td(OFF) tf VSD Forward Transconductance Input Capacitance Common Source Output Capacitance Reverse Transfer Capacitance Turn-ON Delay Time Rise Time Turn-OFF Delay Time Fall Time Diode Forward Voltage Drop 125 0.15 0.3 9.5 17 9.5 17 350 110 30 10 20 20 65 65 1.2 V VGS = 0V, ISD = 160mA ns VDD = 25V ID = 100mA RGEN = 25 pF VDS = 25V, VGS = 0V f = 1MHz 15 35 12 30 m A A V nA Typ Max Unit V Conditions VGS = 0V, ID = 100A VGS = VDS, ID = 1mA VGS = 20V, VDS = 0V VGS = 0V, VDS = 0.8 Max Rating VGS = 0V, VDS = 0.8 Max Rating TA = 125C VDS = 10V, VGS = 4.5V VGS = 4.5V, ID = 100mA VGS = 4.5V, ID = 100mA, TA = 125C VGS = 4.5V, ID = 100mA VGS = 4.5V, ID = 100mA, TA = 125C VDS =15V, ID = 100mA
Notes: 1. All D.C. parameters 100% tested at 25C unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. 3. See TN2540 data sheet for characteristic curves.
Switching Waveforms and Test Circuit
10V
90% INPUT
0V
PULSE GENERATOR
Rgen
10%
t(ON)
t(OFF) tr td(OFF) tF
td(ON)
VDD
10%
10%
INPUT
OUTPUT
0V
90%
90%
(c)2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
2
1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 * FAX: (408) 222-4895 www.supertex.com
VDD
RL OUTPUT
D.U.T.
11/12/01


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